Public opening planned for February 2027
AlephOS 2.0 · Live Emulation & Preservation

Continuing the Sirius Legacy

An emulation of the Sirius handheld and AlephOS 2.0, with notes on the challenges of working with its 1-bit display.

Interactive Hardware Emulation

More than two decades after its original development in Lahore, surviving source code, firmware, and engineering records have been used to reconstruct parts of the Sirius system in emulation. The original Keil C51 source code, disassemblies, and binary images were reconstructed to run in cycle-accurate emulation across three concurrent 8051 processor cores clocked at 40 MHz, including the timing of communication between the processors and the dual-controller liquid-crystal display.

LIVE RB2 HARDWARE EMULATOR

Enter AlephOS 2.0

Operate the reconstructed Sirius directly in its own responsive exhibit view. The display, softkeys, keyboard, and hardware timing remain together on one page that scales to the screen in front of you.

Launch the live emulator
Processors
3 × AT89C51RD2
Clock
40 MHz each
Display
128 × 64 KS0108 LCD
Controls
F1–F6 · keyboard · arrows

Delivering Text and Graphics on a 1-Bit Low-Resolution Display

Most modern interfaces rely on color, hardware compositing, and antialiased text. Designing for the Sirius meant operating within a set of practical limits imposed by a monochrome reflective STN liquid-crystal panel measuring 128×64 pixels. The display contained 8,192 pixels and used 1,024 bytes of video memory.

Because the display was small, the software had to use the available pixels carefully. The engineering challenges extended from physical silicon characteristics to optical and typographic constraints:

AlephOS launcher photographed on the Sirius LCD
AlephOS launcher photographed on the original reflective LCD. The green cast and limited contrast are part of the display’s physical character.
Urdu reader photographed on the Sirius LCD
Urdu reader, photographed. The display shows Arabic-script bitmap typography at the full 128×64 pixel scale.

Explore the Silicon & PCB Architecture

For a detailed breakdown of the tri-microcontroller bus interconnect, clock distributions at 40 MHz, full electrical specifications, and PCB architectural block diagrams:

How Sirius Worked: Hardware Architecture & PCB Analysis →

← Return to the Sirius Object Study